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Micron Internship 2024; Hiring DEG Verification Intern – Apply Now


As a Memory Circuit Design Verification Engineer, you will work in a highly innovative, motivated, young and dynamic design team capable of verifying complete products using state of the art memory technologies. You will need to have the ability to evaluate full chip and/or block level functionality and provide solutions to help the timely delivery of a functionally correct design. Candidates kindly read all the information given below, before proceed to apply

Name of the Organization: Micron

Requisition ID: 24266765

Positions: DEG Verification - Intern

Location: Hyderabad

Salary: As per company Norms

Educational Qualifications:

  • Bachelors or Post Graduate Degree in Electronics Engineering or related engineering field required

Skills Required:

  • Analytical capability for complex gate level circuit designs
  • Basic understanding of CMOS circuit designs
  • Familiar with both SPICE and Verilog simulations
  • Good communication skills and ability to work well in a team

Job Description:

For nearly 40 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.  Our Global team is growing and we are looking for a passionate Memory Circuit Design & Verification Engineer in Micron Technology’s DRAM and Emerging Memory Group (DEG) in India.

Responsibilities:

  • Participate in simulating, analyzing and debugging pre-silicon full chip designs by applying leading edge verification technique
  • Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.
  • Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements.
  • Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design.
  • Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.

 

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