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Qualcomm Recruitment Drive; Hiring Design Verification Engineer – Apply Now


Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Name of the Organization: Qualcomm

Requisition ID: 3066347

Positions: NOC Design Verification - Assoc Engineer

Location: Bangalore

Salary: As per company Norms

Educational Qualifications:

  • Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field
  • 6 months - 1 Year of industry experiences in the following areas: -
    • Basic of digital design concepts, fifo etc
    • Basic understanding of DDR is a plus
    • Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite
    • Understanding of multi-core ARMv8 CPU architecture, coherency protocols and virtualization
    • Minimum requirement is Bachelor of Engineering however preferred is Masters of Engineering in Computer Science or Computer Engineering
    • Candidate must possess right analytical skills, debug oriented mindset and must be open to discuss , deep dive, collate and present the design and environment understanding .

Job Description:

The role generally entails a mixture of:

  • Ownership of a piece of the test bench
  • Planning & execution of feature additions and mode re-enablement on particular variants
  • Bug fixes
  • Debug of regression signatures
  • Developing/Deploying new tools for performance validation
  • Performance monitor and profiler development and deployment
  • Workload specific simulations on the emulator
  • Following skillset is required:
  • Strong Python, C++ skills
  • Reading Specs and developing test plans
  • Monitors, scoreboards, sequencers, and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved
  • Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage, and adding or enabling extra debug, Must be willing to dig into fail and understand what is happening

 

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